BeebIDE harddisc interface for the BBC series

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On this page

• A short history of harddiscs on the BBC
  
• About the interface
  
• Technical details
  
• Availability
  

A short history of harddiscs on the BBC

The original drives used the SASI interface (largely equivalent to a SCSI I interface) which made writing the hardware drivers relatively simple, using high level "sector" operations to talk to the logical layout of the drive.

However this approach has a number of draw backs

1. Original drives are hard to obtain and, being old, are unreliable
2. New SCSI drives rarely support the 256 byte sectors required by the filing systems and cannot be reformatted
3. Nobody makes the SCSI host interface PCBs

About the interface

There are locating holes positioned to allow the interface board to be screwed onto the holes normally used to hold the drive in the PC case, though these can be trimmed off if not required - making the interface the same size as MiniB.

An unpopulated IDE board showing the drive screw holes

Jumper links on the PCB determine where in the memory map the drives appear to software, each interface taking 16 bytes in the range &FC40-FC4F or &FC50-FC5F as desired. As each interface can drive a master/slave combination this gives a potential for up to 4 IDE drives in total.

Though filing system software would be required, there's no reason in principle why an ATAPI device could not appear amongst the 4 drives - opening up the possibility of support for CD-ROM as well as harddisc storage.

Technical details

• Full 16 bit interface with automatic upper byte latching
• 1MHz interface with clean page FC ("Fred") circuitry
• 1MHz loop through to other devices in the chain, with optional termination resistors
• Bus buffering to the drive
• Standard 40 pin IDE interface with key pin in position 20
• Optional interrupt capability to shared nIRQ line

Jumpers define the region in the memory map which the interface appears, with &FC40 being the default. Within this the decoding selects:

As the hardware supports 16 bit transfers, but the 6502 is an 8 bit CPU the wider transfers must be completed in two stages:

• For writes to the drive the "data high" register must be written to first by the CPU, before the low byte. The action of writing the low byte causes the hardware to transfer the full 16 bits to the drive.
• For reads from the drive, the low byte must be read first which will capture the high byte in the interface card, the CPU can then read the high byte from "data high" at a later time.

Note that some registers have different meanings if the drive is programmed to run in logical block addressing mode. For a more complete description of what the registers mean consult the ATA command document.

Availability

The updated filing system ROM containing ADFS with support for IDE drives should be downloaded along with the formatting program, HDInit, written in BASIC.

A completed IDE interface board